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Silicon Labs /SiM3_NRND /SIM3U166_B /LOCK_0 /PERIPHLOCK1

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Interpret as PERIPHLOCK1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UNLOCKED)PMUL

PMUL=UNLOCKED

Description

Peripheral Lock Control 1

Fields

PMUL

PMU Module Lock Enable.

0 (UNLOCKED): Unlock the PMU Module registers.

1 (LOCKED): Lock the PMU Module registers (bits can still be read).

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data